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Revision 90 - (download) (annotate)
Fri Feb 8 14:52:08 2008 UTC (2 years, 6 months ago) by steve
File size: 5059 byte(s)
Updates for SDCC 2.6.0

#
# This is the bread and butter of the build system. Here we define all
# manner of macros, targets and whatever in order to automate the build
# as much as possible. In most cases, you can add a directory to the
# tree, put some sources in there, and Makefile.config will handle the
# rest. This default behaviour can be overridden by creating a file
# named "Makefile.dir" in your source directory containing local macros,
# targets and/or dependencies (see below).
#
# The basic process is that all source files in a directory get compiled,
# and the resulting object files are archived together to form a library.
# By default the library has the same name as the directory containing
# the sources (with an extension of ".a"), but this can be overridden by
# defining "$LIB" in "Makefile.dir". The files which will be copiled and
# eventually archived can be specified by defining "$SRCS" (for C source
# files) and "$ASMSRCS" for assemble language.
#
# The process is also recursive - by default, the Makefile of the current
# directory is copied into its subdirectories, and make is run in each
# one. Override by defining "$SUBDIRS".
#

ARCH=spectrum
include $(TOPDIR)/config/Makefile.$(ARCH)

# Most of these macros, etc. should not normally be overridden. It may
# however be useful to extend them using the "+=" operator.
# Make utility - remove '-s' option if you want to see what's happening
MAKE=make -sr

# Name of current directory ($LIB can be derived from this).
DIR=$(shell basename $$PWD)

.SUFFIXES: .a .asm .bin .c .d .ihx .o
# Compile C files into object files, taking dependencies into account.
%.o: %.c %.d
	echo ' ' Compiling $<
	$(CC) $(CFLAGS) -o $@ -c $<

# Assemble assmebly code into object files.
%.o: %.s
	echo ' ' Assembling $<
	$(AS) $(ASFLAGS) -o $@ $<

# Make a dependency file for a C source file (these are included below).
# The regex is used to reformat sdcc's output into something we can use.
%.d: %.c
	$(CC) $(CFLAGS) -M $< | sed "s/$*.rel: $*.c/$*.o:/" > $@


# The following macros could be overridden by any "Makefile.dir".
# These default values are good for a "standard" directory
# containing source files which will be compiled then linked
# to form a library with the same name as the current directory.
SUBDIRS=$(shell echo `find ./ -maxdepth 1 -type d -print | sed 's/\.\///' | grep -v '\.svn' `)
SRCS=$(shell ls *.c 2> /dev/null)
ASMSRCS=$(shell ls *.s 2> /dev/null)
LIB=$(DIR).a

# Make sure there is an "all" target (hopefully the first one
# make comes across).
.PHONY: dummy
all: dummy

# Include the directory-specific Makefile (if it exists) here,
# as it may have redifined some of the above.
-include ./Makefile.dir

#
# Now that we know our "real" macros, define targets for what
# we actually want to build in this directory.
#

# Do we have C sources to compile?
ifneq "$(SRCS)" ""
COBJS=$(SRCS:.c=.o)
DEPS=$(SRCS:.c=.d)
CJUNK=$(SRCS:.c=.asm) $(SRCS:.c=.lst) $(SRCS:.c=.sym)

# Include the dependencies, if they exist - we rely on other
# rules to ensure they are there when they need to be!
# For "*clean" targets, we're busy deleting them, so they don't
# need to be present.
-include $(DEPS)

clean: srcsclean
realclean: srcsclean
srcsclean:
	rm -f $(COBJS) $(DEPS) $(CJUNK)
endif # $SRCS

ifneq "$(ASMSRCS)" ""
ASMOBJS=$(ASMSRCS:.s=.o)
ASMJUNK=$(ASMSRCS:.s=.lst) $(ASMSRCS:.s=.sym)

clean: asmclean
realclean: asmclean
asmclean:
	rm -f $(ASMOBJS) $(ASMJUNK)
endif # $ASMSRCS

ifeq "$(OBJS)" ""
OBJS=$(COBJS) $(ASMOBJS)
endif # $OBJS

# Recurse into subdirectories if these have been named. As the
# actual Makefile can be used in all subdirectories, we copy
# this into the directory and then run make in it.
ifneq "$(SUBDIRS)" ""
SUBLIBS=$(shell for DIR in $(SUBDIRS) ; do echo $$DIR/$$DIR.a ; done)

all: subdirs
subdirs:
	@for DIR in $(SUBDIRS) ; do \
		echo Making `pwd`/$$DIR && \
		cp -u Makefile $$DIR/ && \
		$(MAKE) -C $$DIR all ; \
	done

# The Makefile is even copied for the "clean" targets. This is
# necessary to ensure there is always a "clean" target for all
# directories allowing proper recursion.
clean: subdirsclean
subdirsclean:
	@for DIR in $(SUBDIRS) ; do cp -u Makefile $$DIR/ && $(MAKE) -C $$DIR clean ; done

# Only a "realclean" will cause the old makefiles to be removed,
# but only after we've ensured the target can be recusive!
realclean: subdirsrealclean
subdirsrealclean:
	@for DIR in $(SUBDIRS) ; do cp -u Makefile $$DIR/ && \
		$(MAKE) -C $$DIR realclean ; rm -f $$DIR/Makefile ; done
endif # $SUBDIRS

# $LIB is generally defined automatically above, or set to
# an empty string to indicate no library should be built here.
ifneq "$(LIB)" ""
all: $(LIB)
$(LIB): $(SUBLIBS) $(OBJS)
	echo '   ' Archiving $@
	$(AR) $(ARFLAGS) $@ $^

clean: libclean
realclean: libclean
libclean:
	rm -f $(LIB)
endif # $LIB

# Make sure these are listed last 
ifneq "$(FINAL)" ""
all: $(FINAL)
endif

# Extra clean targets to report progress in "silent" mode
clean: echoclean
echoclean:
	@echo Cleaning `pwd`

realclean: echorealclean
echorealclean:
	@echo Purging `pwd`


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